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  https://wodewangzhishime.blogspot.com/2023/12/blog-post_13.html?m=1 . Ref:  https://kamchihau.blogspot.com/2022/09/httpskamchihau_6.html?m=1  . . . . . John: See the 1st and 2nd picture pictures above.  The 1st one is the original one.  R0 send out a signal of (0.1.1.1).  Now, we see the 2nd picture.  Because the parallel output line of R0 is a branch of RJ45's Clock line, hacker hack the RJ45's Clock line and change the signal to (1.0.0.0). Me: As a result,  the output from R0 change from (0.1.1.1) to (1.0.0.0). John: Exactly.  . ____ . John : See 3rd Picture above.  There's a frequency mixer which mix the signal from the output of R0 and the signal from the Clock line of RJ45.  Me: If R0 successfully output, RJ45's Clock line must be in down cycle.  . 1) The Signal from the Clock line of RJ45 must be a "Message" wave inside which there is no carrier wave.  . 2) The carrier wave should be the output from R0. . 3) And th...

  https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html . . . . .. . . Me: The upper picture use the inverters to delay the circuit. . However, the lower picture use the JK-Flip Flop to delay the circuit.

https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html . . Ref:  https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html . . .  . . . . Me: This article ( https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html ) mention that if I input 3-2-1-4, it stack overflow. Becuase 3-2 are too close to each other. .  . John: It is the problem of frequency. Me: Yes, . . Look at the 1st picture of this article. . It is an RJ45 circuit. .  This circuit use a capacitor and an inductor to form a filter. John: What's the filter for?? Me: For filtering signal. . . It let the signal within the boundary of frequency pass through. John: That mean, it let 3-2 enter the ground. Me: Yes,

https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html . . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html   . . . Me: The following 4 articles mention how data-field work in RAM.  1)  https://wodewangzhishime.blogspot.com/2021/11/httpswodewangzhishime_96.html 2)  https://kamchihau.blogspot.com/2022/10/httpskamchihau_17.html?m=1 3)  https://wodewangzhishime.blogspot.com/2022/06/satellite-for-loop.html 4)  https://kamchihau.blogspot.com/2022/11/httpskamchihau.html Me: Ok. John:  There're 3 fields of data inside a "register of the RAM". They are, Subject [],  object [],  Value [].   I use (((Mov object, value))) as an example.  <--- In C++, it is ((( int object = value ))); Originally, it is (((Mov register_a, value)))  <--- Note: in C++, it is (((int register_a = value;))) Me: After hacking,  i t become, (((Mov register_b, value))), <--- Note: In C++, it is (((int register_b = va...

https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html . Ref:  https://chihaukam.blogspot.com/2023/09/me-before-person-is-converted-and.html?m=1 . . . . Me: https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html  . .This article mention that if you put too many inverters, the circuit delay too much. . Consequently, stack overflow occur. . Today, we give one more example in which the cirucit doesn't put too many inverters, however, stack overflow sitll occur. . I'm gonna input 3-2-1-4.   3-2 comply with the combination of NPN-PNP. . Look at the above picture. . There're 2 inverters only. . However, 3-2 both comply with the combination of NPN-PNP. . Consequently, stack overflow occur. . John: Because, 3-2 are closed to each other. . The frequency is too high. Me: In this case, stack overflow occur. . .

  https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html  .  . . Me: You may consult it . . https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html .  Inverter is to delay the current flow.  Normally, we put a pair of inverter. . In a single Up cylce, I input 3-2-1-4, indeed, only "3" can be accepted. Why ?? Because, only "3" comply with the combination of NPN-PNP. . If you put too many inverters, the consequency is that not only "3" comply with the combination of NPN-PNP, but, "2" also comply with the combination of NPN-PNP. . Consequently, stack overflow occur.

https://wodewangzhishime.blogspot.com/2023/12/blog-post.html?m=1 . Ref:  https://chihaukam.blogspot.com/2024/10/take-look-at-it_30.html?m=1 . . .. . John:  See the 1st and 2nd pictures.  The inverter delay the fow of current.  The speed of the flow of current of line one is slower than the speed of the flow of current of line two.  When the combination is npn-pnp, the up cycle is at the falling edge.  Me: Ok. John: When 3-2-1-4 are input,  indeed, only 3 has the combination of NPN and PNP. And then , 2-1-4 are discarded. 3. npn pnp 2.  npn npn (discarded) 1.  npn npn (discarded) 4.  pnp npn (discarded) .

  https://wodewangzhishime.blogspot.com/2023/12/sequential-90-enabling-line.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/sequential-90-enabling-line.html . .. . . . . John : Of the 2 picture above,  which picture is correct? Me: Logically,  the 1st picture is correct.  John : The 2nd picture is correct too.  Me: In the circuit of data flip flop, we have the following, . When set and reset is 1-0 -> 1 0-1 -> 0 0-0 -> remain the same.  1-1 -> toggle or illegal.  . Me: In the 2nd picture,  A and B are saturated.  The data flip flop will toggle. John : Yes,. Me: Toggle us invalid.  John : Yes, it's invalid. 

  https://wodewangzhishime.blogspot.com/2023/11/httpswodewangzhishime_29.html . Ref: https://wodewangzhishime.blogspot.com/2023/11/httpswodewangzhishime_29.html . . . . . John : This article is about the "width" of data bus, e.g., 4 bits, 8 bits, 32 bits.  https://wodewangzhishime.blogspot.com/2022/04/httpswodewangzhishime_23.html?m=1 . You might have a look first.  Me: Ok. . John : See the above 2nd Picture. All control bus, data bus and address bus are the branch of Clock line of RJ45. . Me: In another words,  if hacker hack the Clock line of RJ45,  hacker can hack the system bus (Control, address and data bus). . John : Yes, take a look.  . 1) Address bus. . 2) Data bus, e.g., parallel input output line, serial input line.  . __ . 3) Control bus,  e.g.,  interrupt status [ RJ45 clock line], Falling edge trigger[ true ],   Left_Right_Shift status [ Right shift ], Load_Shift_status [  shifting ] .   Acknowledge [Slave] B...