sequential (94) delay circuit b

 https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html

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Ref: https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html . 

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Me: You may consult it . . https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.htmlInverter is to delay the flow of current. Normally, we put a pair of inverter.

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In a single Up cylce, I input 3-2-1-4, indeed, only "3" can be input. . Why ?? Because, only "3" comply with the combination of NPN-PNP.

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If you put too many inverters, the consequency is that not only "3" comply with the combination of NPN-PNP, but, "2" also comply with the combination of NPN-PNP.

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Consequently, stack overflow occur.

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