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Showing posts from March, 2022

sequential (32) Interrupting

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https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_21.html . Ref:   https://wodewangzhishime.blogspot.com/2022/07/httpswodewangzhishime.html . . . John: In the picture above, R0(0), R0(2), R0(4) are on the parallel input clock line. <--- Note: We can call it as a "process" clock line. Me: However, R0(1), R0(3) are on the serial input clock line. John: Yes,. Me: In code, how do we interpret it? . for (int i=0; i<10; i++) // R0(0) output bits by bits. { R0(3) [i] = i; // R0(3) input bit by bit. } . John: When R0(1) and R0(3) are on the serial input clock line, we call that real interrupt. Me: That mean, when the register isn't on the process clock line, it is on the serial input clock line. John: To some extent, "Yes". Taje a look.  https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html . It  mention about how the  fields work. Or, we can intepret it in this way. . Subject [R0(1)] Interrupt status [ serial input clock line ] Objec...

sequential (9) Code being changed

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  https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_20.html . Ref:  https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_53.html?m=1 . . John: Take a look.   https://chihaukam.blogspot.com/2026/01/john-have-look_8.html?m=1 . It say, "Left shifting and stack overflow isn't the principle of hacking. ". See the picture above.  R0 and R1 are 2 independent registers. They have 4 bits. . Me: If they have 4 bits only, there's a problem.  If I wanna do that,  For (int I = 0; I < 8; I ++){} . Me: How can I do that? John : When you press a button,  your code change into . For (int I = 0; I < 4; I ++){} <--- R0 For (int I = 0; I < 4; I ++){} <--- R1 . Me: Who does change it? . John : The system change it.

learning and teaching (39) Madrid train explosion

https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_15.html . Ref: https://wodewangzhishime.blogspot.com/2021/12/battlefield-backlines-discriminating.html . . John : Miuson is the person in this link.  https://chihaukam.blogspot.com/2025/10/in-lesson-of-anatomy-professor-kill-one.html?m=1  . Me: Ok. John : Miss Wang is the person in this link.   https://wodewangzhishime.blogspot.com/2021/10/disavowal.html?m=1 . Me: Ok. ___ . Mr. Lok (a spy from Hong Kong): Why does nobody witness that Miss Wang put the poison (Ebola ) in the dog's food ? . Kelvin : I use the satellite to surveillance the environment of the bakery shop.  I protect Miss Wang.  . Mr. Lok: You are genius.  . Kelvin : You drive a car to the house of John.  You park the car by the gate and Honk. It's the achievement of your professor.   You applaud. . Mr. Lok: I've got it.  __ . Bradley : Kill those students,  e.g., Mr. Lok. Kelvin : Why? Bradley : ...

sequential (41) Architecture of in-out

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  https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_14.html . . Ref:   https://wodewangzhishime.blogspot.com/2022/01/httpswodewangzhishime_20.h . . John : The architect of the above circuit is that indeed,  there is no serial input line.  . Me: Ok. . John: Here's a register called "R0" the value of which has 4 bits.  They are b1, b2, b3, b4. . Me: Ok. . John: The power source of the modulator is from RJ45.  RJ45 is at the Up Cycle.  The modulator will output.  A signal is sent to "R0" through a data bus.  . Note: In the architect of Microsoft,  we call that a data bus instead of a parallel input output line. . Me: Is "R0" parallel input or serial input ? . John : In fact,  you can't find a serial input line or a parallel input line in this architect. What's you can find is a line called "Input line". . Me: Then,  how do I know that it's a serial input or parallel input ? . John : If there's a delayed circ...

sequential (42) no realistic serial circuit (not and gate)

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https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_13.html   . Ref:  https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_15.html . . . Me: OK. Now, we look at the above picture. It is a circuit of "flip and flop" called R0(1). . if (the gate of Setting of R0(1) = 1 & the gate of resetting of R0(1) =0) { if (the clock line of setting of R0(1) is 1 & the clock line of resetting of R0(1) is 1)  { The output of the setting of R0(1) is false; The output of the resetting of R0(1) is true; The status of R0(1) = stable. } } . John: However, hacker may create the following phenomenon. . . if (the gate of Set of R0(1) = 1 & the gate of reset of R0(1) =0) { if ( the clock line of set of R0(1) = 0 & the clock line of reset of R0(1) =1)  { The output of the setting of R0(1) is true; The output of the resettig of R0(1) is true; The status of R0(1) = Unstable .  } } .

sequential (38) Interrupting

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https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_7.html . Ref:  https://kamchihau.blogspot.com/2022/11/blog-post_9.html . . John: Take a look.   https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_73.html  . It talk about real interrupt. Me: OK. John: Now, we look at the picture above. R0(1) and R0(3) aren't on System clock line. Nor is it on the serial input clock line. What do we call it? Me: We call it "mask" interrupt. John: In code, how do we interpret a mask interrupt? Me: Like this. . if (int i != 0)  { R0(1) is at the stage of "Mask Interrupt". That mean, R0(1) isn't on the serial input clock line. Nor is it on the System clock line. } . John: Take a look.  https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html . It mention about how the fields work in "RAM". Or, we can intepret it in this way. . Subject [R0(1)] Interrupt status [Mask-interrupt] Object [R0(21)] Role [ Master ] value [0]

sequential (66) RJ45 (Protocol) direction of current flow

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https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_53.html . Ref: https://kamchihau.blogspot.com/2022/10/httpskamchihau_17.html?m=1 . . . John : You might read this article first.   https://wodewangzhishime.blogspot.com/2023/07/me-look-at-this-article.html?m=1 . . Me: Ok. . John : See the Picture above.  We use Rd+ and Rd- to create a Clk line.  . Me: Ok. . John : Now, b1 send a signal to the + side of the operational amplifier.  . Me: How many voltage is this signal ? . John : 4.5 V. . Me: Ok. . John : In fact, only Tx+ is induced 4.5 V. Tx- is  only induced 0.5 V. Why ? Because,  the current direction of Tx- isn't clear yet. . Me: Common mode block the direction of the current flow of (Tx -). . John : Yes, however,  during the next round, the direction of current flow will be changed.   . Me: Yes, by then, Tx- will be in a favorable situation.   . John: Something like the below, . If (electrical current = lef...

sequential (8)

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https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_1.html . Ref:  https://wodewangzhishime.blogspot.com/2021/11/httpswodewangzhishime_17.html?m=1 . . Me: R0 ,R1, R2 are the physical address of the radio receivers.  . . John: The more far from the radio  emitter , the weaker the signal. . Ok. The distance between radio emitter and R1 or  R2 are samely 2 meters. Why R1's signal is much weaker than R2?? Me: Because, R1 is at 45 degree of angle. On the contrary, R2 is at 90 degree of angle. John: Ok. R1 and R0 have same signal's weakness  . How do I know where they are located ??. . The  emitter  send a signal to R0 and R1, and , wait until they echo. . 1) R0 need 3 second to echo. R0 is more far from the radio emittor. 2) R1 need 1 second to echo. R1 is more near the radio emittor.

sequential (43) No realistic serial circuit (data input)

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https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_26.html Ref:  https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_14.html . . . John: Now, we look at the "above" picture above. Which part is correct? . Me: Normally, the part of left hand side is correct. That mean, when the data input line is on Up cyle, Gate A and Gate B are on Up cycle. . John: You're wrong. The part of right hand side is correct too. . Me: That mean, when the data input line is on Up cycle, Gate A can be on Up cycle and Gate B can be on down cycle. . John: You're correct. OK. I intepret it in code. . If (Gate A = Up cyle) { Set = 1; if (Gate B = Down cyle) { Inverter = true; if (inverter = true) { Gate B = 1; if (Gate B = 1) { Reset = 1; If (Set = 1 & Reset = 1) { The circuit of the Flip Flop = Unstable. } } } } } . .