One hackers covid sars financial crisis aircrash terrorists satellite stock exchange 911

  https://wodewangzhishime.blogspot.com/2023/12/blog-post_43.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_43.html  . . . The process is  1) register -> 2) Cache -> 3) Modulator -> 4) register. John: Inside the cache, there is a field called R/W status. .  Me: This field decide whether the field of value is read-only or read and write. . After the Xor gate checking, if the checking is correct, it will send a signal of 0 to the field of value. . The signal of 0 mean "opening the field of value" .

https://wodewangzhishime.blogspot.com/2023/12/blog-post_13.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_13.html  . . . . 1) The field of value is at the right-side most. 2) The field of value is right-shift unilateral. . John: Here comes a question. . If register 1 is master and register 2 is slave, what happen?? Me: I use the first picture as an example. Register 1 will create a cross over to swap the direction of the flow of the current. . Consequently, left-shift is available. .In reality, left-shift doesn't exist. John: In this case, the field of value will be affected. Me: No, because, the resistance of left shift is higher than the resistance of output. . . Me: I use the second picture as an example. . If the cross-over just cover the field of value. And, it doesn' cover the field of object, the field of value can not left-shift to the field of ojbect. . John: Both picture one and picture two work. 

  https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_12.html . . . Me: The upper picture use the inverters to delay the circuit. . However, the lower picture use the JK-Flip Flop to delay the circuit.

https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html . Ref :  https://wodewangzhishime.blogspot.com/2023/12/sequential-99.html .  . . Me: This article ( https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html ) mention that if I input 3-2-1-4, it stack overflow. Becuase 3-2 are too close to each other. .  . John: It is the problem of frequency. Me: Yes, . . Look at the 1st picture of this article. . It is an RJ45 circuit. .  This circuit use a capacitor and an inductor to form a filter. John: What's the filter for?? Me: For filtering signal. . . It let the signal within the boundary of frequency pass through. John: That mean, it let 3-2 enter the ground. Me: Yes,

https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html . . Ref: https://wodewangzhishime.blogspot.com/2023/12/blog-post_11.html   . . . . . Me: The following 4 articles mention how fields work in RAM. . They are very important. . Why ?? I answer you later. . Maybe,you can read them first. 1)  https://wodewangzhishime.blogspot.com/2021/11/httpswodewangzhishime_96.html 2)  https://kamchihau.blogspot.com/2022/10/httpskamchihau_17.html?m=1 3)  https://wodewangzhishime.blogspot.com/2022/06/satellite-for-loop.html 4)  https://kamchihau.blogspot.com/2022/11/httpskamchihau.html . Me: We deep inside the theme of today. . There're 6 fields inside a register. . They're the fields of Subject, Role, interrupt status, value's type, object and Value.  The field of Value is at the last position. Why??  Because, the field of Value is left shift forbiden. John: The fields of Subject,Role,interrupt,value's type and object are left/right shift bilateral.  Only, the field of value

https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html . Ref:  https://wodewangzhishime.blogspot.com/2023/08/is-that-due-to-wish-to-teach-americas.html . . . Me: https://wodewangzhishime.blogspot.com/2023/12/sequential-94-cross.html  . .This article mention that if you put too many inverters, the circuit delay too much. . Consequently, stack overflow occur. . Today, we give one more example in which the cirucit doesn't put too many inverters, however, stack overflow sitll occur. . I'm gonna input 3-2-1-4.   3-2 comply with the combination of NPN-PNP. . Look at the above picture. . There're 2 inverters only. . However, 3-2 both comply with the combination of NPN-PNP. . Consequently, stack overflow occur. . John: Because, 3-2 are closed to each other. . The frequency is too high. Me: In this case, stack overflow occur. . .

  https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html  .  . . Me: You may consult it . . https://wodewangzhishime.blogspot.com/2023/12/blog-post_2.html .  Inverter is to delay the flow of current.  Normally, we put a pair of inverter. . In a single Up cylce, I input 3-2-1-4, indeed, only "3" can be input. . Why ?? Because, only "3" comply with the combination of NPN-PNP. . If you put too many inverters, the consequency is that not only "3" comply with the combination of NPN-PNP, but, "2" also comply with the combination of NPN-PNP. . Consequently, stack overflow occur.

https://wodewangzhishime.blogspot.com/2023/12/sequential-92-smoothing-capacitor.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/sequential-92-smoothing-capacitor.html   . . . . . 1) About stack overflow, 2) Look at the 1st and 2nd pictures. . Note: The inverter delay the fow of current. The speed of the flow of current of line one is slower than the speed of the flow of current of line two. . 3) When the combination is npn-pnp, the up cycle is at the falling edge.  . 4) Look at the 3rd picture.  . John: When you input 3-2-1-4 to the gate of R1 during one up cycle, indeed, only 3 has the combination of NPN and PNP. .   And then , 2-1-4 are discarded. 3. npn pnp 2.  npn npn (discarded) 1.  npn npn (discarded) 4.  pnp npn (discarded) . John: Look at the last picture. . It is a RJ45 circuit. . .During an Up cycle, there're 3-2-1-4. . Me: Indeed, Port A only input with 3. . .And then, 2-1-4 are discarded. . Why ?? . John: Because, only "3" comply with the combinatio

  https://wodewangzhishime.blogspot.com/2023/12/blog-post.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/blog-post.html   . . John: Before we start, you may read this article first. <  https://kamchihau.blogspot.com/2024/07/sequential-109.html >. Me: OK. . John: This article  < https://wodewangzhishime.blogspot.com/2023/12/blog-post.html >  mention about a stable flip flop. You may read it first.   Me: OK. . John: Now, we start this article. Me: OK. John: At the above picture. There is an Up cycle on the clock line. This up cycle cover R0(0), R0(1), R0(2), R0(3). However, . R0(0)-> stable. R0(1)-> Unstable. R0(2)-> stable. R0(3)-> stable. . John: When R0(1) is unstable, R0(1) become a gap. Me: Then, what does gap mean? John: You may read this article. < https://wodewangzhishime.blogspot.com/2022/04/httpswodewangzhishime_23.html >. It is the meaning of "Gap".

  https://wodewangzhishime.blogspot.com/2023/12/sequential-90-enabling-line.html . Ref:  https://wodewangzhishime.blogspot.com/2023/12/sequential-90-enabling-line.html . . . John: The above picture is a circuit of flip flop. I guess you know that . . When set and reset is 1-0 -> 1 0-1 -> 0 0-0 -> remain the same.  1-1 -> toggle or illegal.  . John: Do you see an Up cycle on the clock line? Me: Yes,. John: This Up cycle is stable.

  https://wodewangzhishime.blogspot.com/2023/11/httpswodewangzhishime_29.html . Ref: https://wodewangzhishime.blogspot.com/2023/11/httpswodewangzhishime_29.html . . . Me: Here, we mention stack overflow. . You may read this article first.  https://wodewangzhishime.blogspot.com/2023/11/httpswodewangzhishime.html  . . I assume I have a 4 bits counter. . Originally, the 4 bits counter is 1-1-1-1. . if (4 bits counter = 0-0-0-0) { Mov object, value. } else { pending(); } . . John: During one Up cycle, if I input 0-0-0-0 to R1, what happen?? . Me: The result is always 0-1-1-1. . You can never achieve 0-0-0-0. . . John: So, how do I achieve 0-0-0-0?? . input 0 to R1 clear (or down cycle) input 0 to R1 clear (or down cycle) input 0 to R1 clear (or down cycle) input 0 to R1 clear (or down cycle)