sequential (52) CPU and RAM

https://wodewangzhishime.blogspot.com/2022/02/httpswodewangzhishime_14.html

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Ref: https://kamchihau.blogspot.com/2022/11/impact.html.

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John: You might read this article (https://wodewangzhishime.blogspot.com/2022/01/httpswodewangzhishime_45.html) first.

Me: OK.

John: Now, we look at the picture above. Circuit A and Circuit B link to each others by the clock line only.

Me: Therefore, both circuit A and circuit B are independent from each others. They have their own modulator. They have their own line of parallel in out.

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John: OK. If register a wanna transfer the datas to register e, how can it be done?

Me: Below.

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In this case, register a and cache a must pull themselves out from circuit A, and then, put themselves on a common circuit.

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At the same time,

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Register e and cache e must pull themselves out from circuit B, and then, put themselves on the common circuit.