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  https://wodewangzhishime.blogspot.com/2023/07/me-look-at-this-article.html . Ref: https://wodewangzhishime.blogspot.com/2023/07/me-look-at-this-article.html . . Register 5 can't send anything to register 4 " directly ". .  Register 5 must send to the cache of R4 first. .  And then, the cache of R4 will send to the modulator.  .  Lastly, the modulator will send to Register 4. . John: There're the cache of R1,2,3,4,5. .Next to the cache of R1,2,3,4,5, there 're Xor gates which are used to compare and check. . If the signal from register 5 enter the loop-back line, does the signal of register 5 need to goes into the Xor gate of R1,2,3,4,5 for comparing and checking ?? Me: Indeed, the signal of register 5 need go through the xor gate of R1,2,3,4,5 . However, in reality, it doesn't need it. John: Why ?? Me: There're 3 Loop-back line. . They are L1 loop-back line, L2 loop-back line, L3 loop-back line. . Indeed, on the L1 loop-back line, only R4 has an Xor gate

  https://wodewangzhishime.blogspot.com/2023/07/blog-post.html . Ref: https://wodewangzhishime.blogspot.com/2023/07/blog-post.html . . . John: The above picture is the process of output of RJ45. The first step is MOV Port C, value. Me: And then? . 1) The data input of R3 is from the data output of R2 (R2 right shift to R3) 2) The data input of R2 is from the data output of R1. (R1 right shift to R2) . John: Then, where is the data input of R1 from? Me: From the clock line. John: That mean, the data-input line of R1 is linked to the clock line. Me: Correct. When the clock line is up cyle, R1 is being triggered. We call that point as "Output triggering point". John: When Port A is triggered, R1 right shift to R2, R2 right shift to R3, etc. Me: Finally, R3 output. .

  https://wodewangzhishime.blogspot.com/2023/02/httpswodewangzhishime.html . Ref: https://wodewangzhishime.blogspot.com/2021/12/httpswodewangzhishime_28.html?m=1   . . . Me: The above picture is a transistor-latch . . This latch is formed by one PNP transistor and one NPN transistor. . T1,2 stand for transistor 1, 2. John: When we give a positive voltage to the gate of T1, T1 will be conducted forever. . We call that a latch. . Me: How can we let a latch unlatch ?? . VSS stand for source of power. . 1) Give a negative voltage to the gate of T1 or 2) Cut the VCC. . That mean , cut the source of power. . John: A latch is to temporarily latch the data in the memory, when the latch unlatch, the memory will lose forever.