sequential (63) - System bus

https://wodewangzhishime.blogspot.com/2022/03/httpswodewangzhishime_73.html
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Ref:  https://kamchihau.blogspot.com/2022/11/httpskamchihau.html

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John : This article is about System bus.  https://wodewangzhishime.blogspot.com/2023/12/sequential-90-enabling-line.html?m=1 . You may have a look at it first. 

Me: Ok.

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See the picture above. 

1) It is a register of serial input. 

2) The field of  value of it has 4 bits.

3) The bit of the left-most is the bit of being input.

4) And, ((S.I. Line)) stand for serial input line.

5) This register right shift. 

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Me: Ok. 

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John: There're 3 type of data bus of a serial input in term of their width. 

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1) Bus width 4 bits.

2) Bus width 8 bits.

3) Bus width 32 bits.

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John : In the picture,  its Bus width us 4 bits. That mean, during 1 up-cycle of the clock line,  maximum 4 bits are allowed to be input together in the field of value of a register of serial input.  This 4 bits are  ((( 1 . 0 . 1. 0 ))) respectively.  In code, we can present it in this way,

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For (int i = 0; i < 1 ; i + 4 i)

{

Sum = Sum + 4 i; < -- You may regard it as a stack overflow. During 1 up-cycle, 4 bits are input in a serial circuit. 

}

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Note : If during 1 up-cycle of the clock line,  if 1 bit is allowed to be input and 1 bit is allowed to right shift,  if the width of a data bus is 4 bits, it can be regarded as stack overflow. 

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John : In a register of serial input,  each up-cycle, there are 4 bits being input. It is faster than each up-cycle, there's only 1 bit being input.

Me: The whole process become,

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1) Clock line being in an up-cycle. 

2) 4 bits being input "together" into the field of value of a register of serial input. 

3) 4 bits being right shift "together".